# Interdisciplinary Applied Mathematics

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fi =    n =12,

and for the gap element (nodes 2, 3, 4, 5) we have

fn = fn(Я2,,q4,q5),    n = 2 3 4 5

where fn,    represents    the    internal    forces    (the    forces in    the    x-direction,    y-

direction, and the moment) acting at node n, and qn represents the node displacements (the displacements in the x- and y-directions and the angle of rotation). The superscript and the subscript denote the element number and the node number, respectively. Each node has three degrees of freedom in 2D:    the    displacements    in the    x-    and y-directions    and    the    rotation.    The

sum of    all    the    internal    forces    (fn)    acting    at    a    given    node is equal    to    the

external load P acting at the node, which in this case is the electrostatic

force. The assembled equations for each node are given by Pi = /i(9i ,92),

P2 = /2i(qi,92) + f22(929    95),

p3 = f32(92,93,94, 95),

P4 = f4 ( 92,93, 94, 95),

P5 = f52(92,93, 94, 95)

The displacements and the rotations associated with nodes 1, 4, and 5 are zero, so they are removed. The final system of equations is given by

P2 = /2 (92) + /2 (92,93),

p3 = /32(92,93)

This system of equations can be solved by standard numerical methods.

NODAS (Fedder and Jing, 1998) is a circuit-level behavioral simulation tool that uses the concept of nodal analysis. Design with NODAS starts from schematic entry, where microsystem elements (such as beams and fluidic channels) and circuit elements (such as transistors) can be wired together. A composite net list for the entire system is generated and sent to the circuit simulator. In the schematic generation phase, terminals of element instances are represented by groups of pins. Each pin has an associated discipline determining its physical nature. Since schematic assembly consumes a lot of effort and is prone to error, if pins were used for each degree of freedom, buses are used in digital circuit schematics for compactness of schematic representation. Similarly, for the same reason analog buses are used in NODAS; however, since existing limitations in analog HDLs (hardware description languages) allow only pins of the same discipline to be grouped as one bus, they result in three buses per terminal: translational, rotational, and electrical. This compact terminal representation reduces wiring effort and wiring errors. Splitters are the behavioral blocks used to convert scalar wires to bus wires. They also apply stimuli and monitor simulation results at the individual degree of freedom. Global acceleration and rotational rate pins are used and shared by all elements in combination with the hierarchical schematic for each model to reduce clutter in the schematic. These pins take care of the external dynamics influence. The “through” and “across” variables are chosen in accordance with Kirchhoff’s laws. The across variables are chosen depending on the output required. Since Kirchhoff’s network laws are applied in the chip’s reference frame, coordinate transformation matrices are used to transform from one coordinate system to another. Some of the basic lumped models used are the linear beam model, nonlinear beam model, and nonlinear gap model. SUGAR (Zhou et al., 1998) uses a similar approach by modeling the MEMS structures in terms of three basic elements (i.e., beams, gaps, and anchors) and builds the ODE models for each kind. The system equations are then formulated according to node connectivity information given as an input file and solved using nodal analysis.

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